Thursday, September 25, 2014

Power Back up Circuit for CMOS ICs

Even very brief mains power failures cause problems for electronic circuits. Stored data are lost and the operating statuses are no longer what they were before the power failure.
Mains power failures cannot be prevented, but methods can be employed to provide a voltage backup for the duration of the fault. For this reason, mains-powered equipment is often fitted with backup batteries (nicad or lithium cells) to maintain operation during a mains power failure. In view of the low currents (microamperes) required for data storage with modern Fl/-lVls, there ls·~ an alternative backup method which is well worth consider- ing: power backup with an electro- lytic capacitor for energy storage! The circuit diagram Tshcvvs .just such an application. The power standby’ capacitor C1 is 4700 ;,iF and with a maximum load current of 10;;/~, the discharge time at an output voltage of 5 V is approxi- mately 53 minutes. The operating voltage of the circuit itself is 15 V, 10 V higher than the output voltage. As long as the 15 V supply voltage ls applied, capacitor C1 charges up to the value of the operating voltage via diode D1. Simultaneously, a bias voltage of approximately 2.3 V is applied to the gate of field effect transistor T1 via voltage divider R1/R2. This ensures that T1 is turned on and capacitor C2 is charged up.

The output voltage at the source t iinal r~· th e second field effect transistor remains a constant 5 V. The two FETs can be thought of as a voltage divider. lf the supply voltage fails, electro- lytic capacitor C1 will become the temporary power supply. Since the gate voltage is removed from T1 it turns off. Capacitor C2 is no longer being charged. However, it‘can only discharge very slowly because T2 has a very high input resistance. The voltage across C2 remains almost constant. Capacitor C1 supplies the operating voltage required for T2 so that it conducts and maintains the output voltage at 5 V. Capacitor Cl discharges very slowly, as a function of its insulation resistance (R|N3 approximately 1 l/ll and the load current flowing. The output voltage at the source lead of T2 remains a constant 5 V, until the voltage across C1 has also dropped to 5 V. lf this voltage drops even further, FET T2 remains turned on but the output voltage decreases proportionally. For correct functioning of the circuit, it is very important t0 select an MKT type of foil capacitor for C2. (M stands for metailised and KT is the standard designation for pciyester foii). (Siemens Application}







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